IBM unveils a super-dense 5nm chip

US technology giant, IBM made a groundbreaking announcement today. The company has created industry-first silicon nanosheet transistors for the development of 5-nanometer chips.

Developed in collaboration with Research Alliance partners, GlobalFoundaries and Samsung, the chip will pack 30 billion 5nm switches onto a chip the size of a fingernail. This development comes more than two years after IBM created the world's first 7-nanometer test node silicon chip, which included 20 billion transistors.

The company claims that the 5nm chip achieves 40 percent performance boost, or 75 percent power efficiency with the same performance when compared with the current-generation 10nm chips.

Arvind Krishna, senior VP, Hybrid Cloud and director, IBM Research said, "For business and society to meet the demands of cognitive and cloud computing in the coming years, advancement in semiconductor technology is essential. That’s why IBM aggressively pursues new and different architectures and materials that push the limits of this industry and brings them to market in technologies like mainframes and our cognitive systems."

Even after 52 years, IBM still seems to be following Moore’s Law, a prediction made by Intel co-founder and chairman emeritus Gordon Moore, who said that the number of transistors on a single chip would double every two years.

The company is using stacked silicon nanosheets, to pack transistors tightly. The nanosheet transistor sends electrons through four gates, whereas the current-generation FinFET transistor design that sends electrons through three gates.

Though the company is yet to provide more details, the transistors, though still a prototype, are expected to further accelerate the pace of development of cognitive computing, the Internet of Things (IoT), and other data-intensive applications.

More details of the process will be presented at the 2017 Symposia on VLSI Technology and Circuits Conference in Kyoto, Japan.