BANGALORE, INDIA: Surveillance is the latest video market segment to move towards high-definition (HD) and demand correspondingly high performance video processing capabilities. HD surveillance cameras need to directly encode the image with a high-quality H.264 Encoder, so the image can be realistically transmitted over a standard Ethernet connection.
A main profile H.264 Encoder that can encode an HD video stream in real time requires a silicon platform that combines a high-performance signal processing fabric with low-cost and also low-power – making the latest generation low-cost FPGAs an ideal choice for implementation.
The HD Surveillance Camera Architecture
The newer high-definition IP cameras are end-points in an all IP-networked digital system. These IP cameras capture HD video, pre-process, encode, and send out the encoded stream via Ethernet. All the signal processing has to be implemented in a single device to meet the stringent cost and power requirements of such a system.
Figure 1 shows a top-level architecture of such a camera. Note that in addition to the encoding engine, a cost-effective design also integrates the camera sensor pre-processing, a frame buffer memory controller, an embedded processor for system control, and an Ethernet MAC. The objective is to achieve maximum integration and the lowest cost/power metric for the entire system.
Figure 1, Top Level Architecture of an HD Surveillance System
This design includes a camera sensor front end module, a video compression module, an Ethernet MAC module, an embedded processor, and a multi-port frame buffer that provides memory storage to all other modules.
The multi-port frame buffer serves as a hub. All other modules send and receive data to and from the frame buffer that communicates with other modules. Video images received by the camera sensor are sent to the camera sensor front end module. The camera sensor front end module processes the video data and stores the video to the frame buffer. Next, the H.264 Encoder reads that video data from the frame buffer and performs the encoding process. The H.264 Encoder then stores the compressed bit stream back to the frame buffer. At the last step, the Ethernet MAC module reads the compressed bit stream from the frame buffer and sends it to the Ethernet.
