BANGALORE, INDIA: Altera Corporation announced a new addition to its FPGA (field-programmable gate array) family, Altera Cyclone III LS.

Altera Altera Cyclone III LS, touted to be the industry's first lowest power FPGA, offers upto 200K logic elements (Les) at less than 0.25W of static power for. It also includes a comprehensive information-assurance design suite, which offers anti-tamper, design-security and design-separation capabilities, TSMC 60-nm low-power (LP) process and Quartus II software power-aware design flow.

Cyclone III LS offers the highest logic memory, up to 8.2 Mbits of embedded memory, and DSP density, ranging from 70K to 200K LEs, per board area and also supports up to 396 embedded multipliers.

Susan Chang, AP marketing manager, Cyclone Series, said: "Any market that needs low-power and security features will need this product. We're offering a complete solution that protects against IP theft and tampering. In India, military will be an very important market segment because these FPGAs have the reach, density, memory and security features. At the same time, consumer electronics, automotive, and industrial spaces will be also targeted."

Altera's Cyclone III LS reduces board space up to 50 percent, secure IP for revenue protection, increase battery life by up to 2X and also reduces BoM (Bills of Material) cost. The Cyclone III LS FPGA also supports single-chip solution for next-generation military applications such as software-defined radio (SDR).

"Altera has already started started shipping the product to the US and Europe. We are mainly targeting power and board-space-sensitive applications in all market segments including military and industrial The Cyclone III LS FPGAs allow a single-chip solution for next-generation military applications such as software-defined radio (SDR)."

To protect highly sensitive information, the Cyclone III LS FPGAs' anti-tamper features include JTAG port protection, tamper monitoring, and cyclical redundancy check (CRC).