MOUNTAIN VIEW, USA: Actel Corp. announced the immediate availability of eight free-of-charge design examples for use with its low-power, flash-based FPGAs.

These design examples feature complete and fully tested solutions that are ready-to-use and customizable. In the low-power, high-volume space, design examples are a valuable resource that frees system designers to focus on critical issues, reduce design time, boost productivity and accelerate their product's time-to-market.

The design examples are optimized for use with Actel's low power ProASIC(R)3 FPGAs and IGLOO(R) FPGAs, including the lowest power FPGAs in the industry, IGLOO nano. In addition, the design examples are specifically targeted at designs requiring a low-power companion solution for input/output (I/O) expansion, interface conversion, or power and clock management.

The eight new design examples showcase commonly used functions in power management, display control, system clock generation, level shifting and I/O expansion/bridging. Actel low-power FPGAs are a perfect fit when small footprint or high I/O count is needed to complement low-power processors or improve performance in low-cost microcontroller-based systems.

Design examples from Actel
* GPIO Expansion Using UART
* UART-to-SPI Interface
* Implementing an OLED Controller Parallel Interface
* SPI-to-I2C Interface
* Using IGLOO and ProASIC3 FPGAs as a System Power Sequencer
* Clock Generation and Distribution
* Microcontroller I/O Expander
* Level Shifter

Each design example consists of an application note and design files, which may include HDL source code, testbenches, software and supporting design files. All design examples have been verified on Actel development kits and can be modified to optimize specific system implementations for reduced cost or for enhancing the capability of designers to differentiate their products.